基于FPGA的VGA和HDMI视频拼接系统设计 下载本文

wire ch2_de; wire ch2_vs;

wire[15:0] ch2_yc_data; wire ch2_f;

wire ch3_de; wire ch3_vs;

wire[15:0] ch3_yc_data; wire ch3_f;

wire[7:0] pat_data;

wire[7:0] cvbs_data_ch0; wire[7:0] cvbs_data_ch1; wire[7:0] cvbs_data_ch2; wire[7:0] cvbs_data_ch3; demux demux_m0(

.clk_108m(cvbs_in_clkp), .clk_27m(cvbs_in_clkn), .vin_data(cvbs_in_data),

.vout_data_ch0(cvbs_data_ch0), .vout_data_ch1(cvbs_data_ch1), .vout_data_ch2(cvbs_data_ch2), .vout_data_ch3(cvbs_data_ch3) );

bt656_decode bt656_decode_m0( .clk(cvbs_in_clkn),

.bt656_in(cvbs_data_ch0), .yc_data_out(ch0_yc_data), .vs(ch0_vs), .hs(),

.field(ch0_f), .de(ch0_de),

.is_pal(is_pal[CH0-1]) );

bt656_decode bt656_decode_m1( .clk(cvbs_in_clkn),

.bt656_in(cvbs_data_ch1), .yc_data_out(ch1_yc_data), .vs(ch1_vs), .hs(),

.field(ch1_f),

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.de(ch1_de),

.is_pal(is_pal[CH1-1]) );

wire ch0_vout_rd_req;

wire[23:0] ch0_vout_ycbcr; wire ch1_vout_rd_req;

wire[23:0] ch1_vout_ycbcr;

video_pro#(.MEM_DATA_BITS(MEM_DATA_BITS))video_pro_m0( .rst_n(1'b1),

.vin_pixel_clk(cvbs_in_clkn), .vin_vs(ch0_vs), .vin_f(ch0_f),

.vin_pixel_de(ch0_de),

.vin_pixel_yc(ch0_yc_data), ///////////

.vin_scaler_clk(phy_clk), .vin_s_width(12'd720), .vin_s_height(12'd576),

.clipper_left(12'd0), .clipper_width(12'd360),

.clipper_top(12'd0),

.clipper_height(12'd576),

.vin_t_width(12'd360), .vin_t_height(12'd576), .vin_K_h(16'h0100), .vin_K_v(16'h0100),

//////////////////////////

.vout_pixel_clk(vga_out_clk_fpga), .vout_vs(vga_out_vs),

.vout_pixel_rd_req(ch0_vout_rd_req), .vout_pixel_ycbcr(ch0_vout_ycbcr),

///////////

.vout_scaler_clk(vga_out_clk_fpga), .vout_s_width(12'd360), .vout_s_height(12'd576),

.vout_t_width(12'd1024),

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.vout_t_height(12'd768), .vout_K_h(16'h005a), .vout_K_v(16'h00c0), ///////////mem .mem_clk(phy_clk),

.wr_burst_req(ch0_wr_burst_req), .wr_burst_len(ch0_wr_burst_len), .wr_burst_addr(ch0_wr_burst_addr),

.wr_burst_data_req(ch0_wr_burst_data_req), .wr_burst_data(ch0_wr_burst_data), .wr_burst_finish(ch0_wr_burst_finish), .rd_burst_req(ch0_rd_burst_req), .rd_burst_len(ch0_rd_burst_len), .rd_burst_addr(ch0_rd_burst_addr),

.rd_burst_data_valid(ch0_rd_burst_data_valid), .rd_burst_data(ch0_rd_burst_data), .rd_burst_finish(ch0_rd_burst_finish), .base_addr(2'd0) );

video_pro#(.MEM_DATA_BITS(MEM_DATA_BITS))video_pro_m1( .rst_n(1'b1),

.vin_pixel_clk(cvbs_in_clkn), .vin_vs(ch0_vs), .vin_f(ch0_f),

.vin_pixel_de(ch0_de),

.vin_pixel_yc(ch0_yc_data), ///////////

.vin_scaler_clk(phy_clk), .vin_s_width(12'd720), .vin_s_height(12'd576),

.clipper_left(12'd360), .clipper_width(12'd360),

.clipper_top(12'd0),

.clipper_height(12'd576),

.vin_t_width(12'd360), .vin_t_height(12'd576), .vin_K_h(16'h0100), .vin_K_v(16'h0100),

//////////////////////////

.vout_pixel_clk(hdmi_out_clk),

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.vout_vs(hdmi_out_vs),

.vout_pixel_rd_req(ch1_vout_rd_req), .vout_pixel_ycbcr(ch1_vout_ycbcr),

///////////

.vout_scaler_clk(hdmi_out_clk), .vout_s_width(12'd360), .vout_s_height(12'd576),

.vout_t_width(12'd1024), .vout_t_height(12'd768), .vout_K_h(16'h005a), .vout_K_v(16'h00c0), ///////////mem .mem_clk(phy_clk),

.wr_burst_req(ch1_wr_burst_req), .wr_burst_len(ch1_wr_burst_len), .wr_burst_addr(ch1_wr_burst_addr),

.wr_burst_data_req(ch1_wr_burst_data_req), .wr_burst_data(ch1_wr_burst_data), .wr_burst_finish(ch1_wr_burst_finish), .rd_burst_req(ch1_rd_burst_req), .rd_burst_len(ch1_rd_burst_len), .rd_burst_addr(ch1_rd_burst_addr),

.rd_burst_data_valid(ch1_rd_burst_data_valid), .rd_burst_data(ch1_rd_burst_data), .rd_burst_finish(ch1_rd_burst_finish), .base_addr(2'd1) );

////////////////////////////////////////////////////// vout_display_pro vout_display_pro_m0( .rst_n(rst_n),

.dp_clk(vga_out_clk_fpga), .h_fp(H_FP[11:0]), .h_sync(H_SYNC[11:0]), .h_bp(H_BP[11:0]),

.h_active(H_ACTIVE[11:0]), .h_total(H_TOTAL[11:0]),

.v_fp(V_FP[11:0]), .v_sync(V_SYNC[11:0]), .v_bp(V_BP[11:0]),

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.v_active(V_ACTIVE[11:0]), .v_total(V_TOTAL[11:0]),

.hs(vga_out_hs), .vs(vga_out_vs), .de(vga_out_de),

.rgb_r(vga_out_rgb_r), .rgb_g(vga_out_rgb_g), .rgb_b(vga_out_rgb_b),

.layer0_top(12'd0), .layer0_left(12'd0), .layer0_width(12'd1024), .layer0_height(12'd768), .layer0_alpha(8'hff),

.layer0_rdreq(ch0_vout_rd_req), .layer0_ycbcr(ch0_vout_ycbcr) );

////////////////////////////////////////////////////// vout_display_pro vout_display_pro_m1( .rst_n(rst_n),

.dp_clk(hdmi_out_clk), .h_fp(H_FP[11:0]), .h_sync(H_SYNC[11:0]), .h_bp(H_BP[11:0]),

.h_active(H_ACTIVE[11:0]), .h_total(H_TOTAL[11:0]),

.v_fp(V_FP[11:0]), .v_sync(V_SYNC[11:0]), .v_bp(V_BP[11:0]),

.v_active(V_ACTIVE[11:0]), .v_total(V_TOTAL[11:0]),

.hs(hdmi_out_hs), .vs(hdmi_out_vs), .de(hdmi_out_de),

.rgb_r(hdmi_out_rgb_r), .rgb_g(hdmi_out_rgb_g), .rgb_b(hdmi_out_rgb_b),

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