基于FPGA的电子密码锁设计

摘要

VHDL非常适用于可编程逻辑器件的应用设计。尤其在大容量CPLD和FPGA的应用设计中,若采用以往的布尔方程或门级描述方式,很难快速有效地完成。VHDL能提供高级语言结构,方便地描述大型电路,快速地完成设计。它是一种标准语言,它的设计描述可被不同的工具所支持,可用不同器件来实现。文中以基于FPGA的电子密码锁的设计为实例,从方案的确定,各阶层的划分,VHDL的应用,采用了VHDL自顶向下的设计方法。它是一种 高效率设计出它体积小、功耗低、价格便宜、安全可靠、维护和升级都十分方便的电子密码锁电路。 关键词:VHDL;自顶向下的设计方法;数字密码锁; EDA;数字系统

ABSTRACT

VHDL is very suitable to the design of programmable logic devices. It is difficult to design large ca-pacity CPLD and FPGA with the description method of Boolean equations or of gates. VHDL can provide highlevel language structure, describe large scale circuit conveniently and complete design rapidly. It is a standard language. It sdesign description can be supported by different tools and implemented by different devices. This paper intro-duces the VHDL top-down design method including scheme determination, hierarchy division, and In order to FPGA-based electronic password-lock design as an example. It is a highly efficient design of its small size, low power consumption, cheap, safe and reliable, maintenance and upgrades are very convenient electronic password lock circuit.

Key words: VHDL; top-down design method; digital code lock; EDA; digital system

目录

摘要?????????????????????? ABSTRACT???????????????????? 第一章总体设计

1.1 设计任务和要求???????????????????????? 1.2 设计方案的比较论证??????????????????????? 1.3 基于FPGA电子密码锁总体设计框图???????????????? 第二章 电子密码锁单元电路设计

2.1 可编程逻辑器件???????????????????????? 2.1.1 FPGA器件的特点?????????????????????? 2.1.2 设计器件的选择?????????????????????? 2.1.3 设计方法采用自顶向下的设计???????????????? 2.2 功能电路的设计???????????????????????? 2.2.1 键盘扫描电路设计?????????????????????? 2.2.2 时序产生电路设计?????????????????????? 2.2.3 键盘消抖电路设计?????????????????????? 2.2.4 键盘译码电路设计?????????????????????? 2.2.5 按键存储电路设计?????????????????????? 第三章 电子密码锁控制电路设计

3.1 数字按键输入部分???????????????????????? 3.2 功能键输入部分????????????????????????? 3.3 三种工作模式?????????????????????????? 3.4 系统各功能模块设计?????????????????????? 第四章 电子密码锁显示电路设计

4.1数据选择电路?????????????????????????? 4.1.1电路原理?????????????????????????

4.2 BCD对七段显示器译码电路???????????????????? 4.2.1 74LS48引脚图??????????????????????4.2.2 74LS48内部引脚功能?????????????????? 4.2.3 BCD对七段显示器译码电路原理?????????????? 4.3七段显示器扫描电路???????????????????????? 第五章 程序调试、波形仿真、结论分析

5.1 EDA工具简介??????????????????????????? 5.2 FPGA的器件的配置与下载???????????????????? 5.2.1 配置方式????????????????????????5.2.2 基于差分的下载电缆???????????????????? 5.3 程序调试、波形仿真???????????????????????? 5.3.1 键盘扫描电路程序波形仿真???????????????? 5.3.2 时序产生电路程序波形仿真???????????????? 5.3.3 键盘消抖电路程序波形仿真???????????????? 5.3.4 键盘译码电路程序波形仿真???????????????? 5.3.5 按键存储电路程序波形仿真???????????????? 第六章结语?????????????????????????? 致 谢???????????????????????????? 参考文献???????????????????????????? 附程序??????????????????????????????

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