理工大学学士学位论文
摘 要
随着计算机在人们生活中重要性和不可或缺性的提高，为了更方便的为大众使用，发展计算机性能成为IT行业的热点，但计算机的内部结构极其复杂，为了便于研究便产生了模型计算机。
本文完成了基于VHDL的8位模型计算机的设计与实现。文中首先阐述了8位模型计算机的原理，然后对其十个功能模块（算术逻辑运算单元，累加器，控制器，地址寄存器，程序计数器，数据寄存器，存储器，节拍发生器，时钟信号源，指令寄存器和指令译码器）进行了分析与设计。最后在Quartus II 9.0环境下进行了仿真，完成了8位模型计算机的整体实现。
本文综合了计算机组成原理和数字逻辑与系统设计的知识，设计的8位模型计算机能更方便的了解计算机内部构造和工作原理。整个系统的开发体现了在Quartus II软件平台上用VHDL设计数字控制系统的实用性。
关键词：8位模型机 ； Quartus II ；VHDL语言
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理工大学学士学位论文
Abstract
With the improvement of importance and indispensability in computer in people's life,in order to use more conveniently for public ,computer performance is becoming a hot in the IT industry development.but the internal structure of the computer is very complicate,Computer model simplifies the difficulty of the research.
This article completed the design and implementation of eight model computer based on VHDL.First ,this article expounds the principle of eight model computer,then divides it into 10 modules(arithmetic logic unit, accumulator, controllers, address register, the program counter and data registers, memory, beat generator, a clock signal, instruction register and instruction decoder)and analyse and design each of them.Finally under the environment of the Quartus II 9.0 simulation, completed overall implementation of the 8 model computer. The analysis and design of the eight model computer integrated the knowledge of computer constitute principle and Digital logic and system design. The design of the eight model computer can be more convenient to understand internal structure and working principle.The whole system development manifests the practicability of designing the numerical control system on the Quartus II software platform with VHDL.
Key words: eight model computer ; VHDL language; Quartus II
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理工大学学士学位论文
目 录
1 绪论 ...................................................................................................................................... 1
1.1 本课题研究的目的 .................................................................................................... 1 1.2 本课题研究的背景及意义 ........................................................................................ 1 2 基于VHDL编程的基础知识 ............................................................................................. 4
2.1 VHDL语言概述 ........................................................................................................ 4 2.2 VHDL的设计流程 .................................................................................................... 5 2.3 有关Quartus II 的介绍 ............................................................................................. 6 2.4 本课题基于Quartus II的设计流程 .......................................................................... 8 3 基于VHDL8位模型机的原理与设计 ............................................................................... 9
3.1 模型计算机的原理 .................................................................................................... 9 3.2 模型机的总体设计要求 ............................................................................................ 9 3.3 模型机逻辑框图的设计 .......................................................................................... 10 3.3 模型机的指令系统设计 .......................................................................................... 10 3.4 模型机的指令执行流程设计 .................................................................................. 11 3.5 基于VHDL8位模型机各模块的设计与实现 ....................................................... 12
3.5.1 算术逻辑单元ALU模块 .............................................................................. 12 3.5.2 累加器模块 .................................................................................................... 14 3.5.3 控制器模块 .................................................................................................... 18 3.5.4 节拍发生器 .................................................................................................... 21 3.5.5 指令寄存器模块IR和指令译码器 .............................................................. 24 3.5.6 时钟产生器 .................................................................................................... 28 3.5.7 程序计数器模块 ............................................................................................ 30 3.5.8 地址寄存器MAR .......................................................................................... 33 3.5.9 存储器RAM .................................................................................................. 36 3.5.10 数据寄存器DR ............................................................................................ 38
4 基于VHDL的8位模型计算机的实现 ........................................................................... 42
4.1 基于VHDL的微程序执行流程图 ......................................................................... 42 4.2 8位模型机的顶层原理图设计 ............................................................................... 43
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