http://www.synopsys.com.cn/inform
ation/snug/2009/low-power-impleme
ntation-flow-based-ieee1801-upf
鍩轰簬
IEEE1801(UPF)
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Low-power Implementation Flow Based
IEEE1801 (UPF)
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Abstract
Power consumption is becoming an increasingly important aspect of ASIC design. There are several
different approaches that can be used to reduce power. However, it is important to use these low-power
technology more effectively in IC design implementation and verification flow. In our latest low-power chip,
we completed full implementation and verification flow from RTL to GDSII successfully and effectively by
adopting IEEE1801 Unified Power Format (UPF). This paper will focus on UPF application in design
implementation with Synopsys low power solution. It will highlight that how to describe our low-power
intent using UPF and how to complete the design flow. This paper first illustrates current low-power
methodology and UPF鈥檚 concept. Then, it discussed UPF application in detail. Finally, it gives our
conclusion.
Key words: IEEE1801, UPF, Low-Power, Shut-Down, Power Gating, Isolation, IC-Compiler
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