CPU
鐭ヨ瘑璇﹁В
-64
浣嶆妧鏈?/p>
EM64T
鎶�鏈?/p>
214
灏忔父鎴?/p>
http://www.214xyx.com/
杩?/p>
閲?/p>
鐨?/p>
64
浣?/p>
鎶�
鏈?/p>
锛?/p>
鏄?/p>
鐩?/p>
瀵?/p>
浜?/p>
32
浣?/p>
鑰?/p>
瑷�
鐨?/p>
锛?/p>
杩?/p>
涓?/p>
浣?/p>
鏁?/p>
鎸?/p>
鐨?/p>
鏄?/p>
CPUGPRs
锛?/p>
General-PurposeRegisters
锛岄�氱敤瀵勫瓨鍣級鐨勬暟鎹搴︿负
64
浣嶃�?/p>
64
浣嶆寚浠ら泦灏辨槸杩愯
64
浣嶆暟鎹殑鎸囦护锛屼篃灏辨槸璇达紝澶勭悊鍣ㄤ竴娆″彲浠ヨ繍琛?/p>
64bit
鏁版嵁銆?/p>
64bit
澶勭悊鍣ㄥ苟闈炵幇鍦ㄦ墠鏈夌殑锛屽湪楂樼鐨?/p>
RISC
锛?/p>
ReducedInstructionSetComputing
锛岀簿
绠�鎸囦护闆嗚绠楁満锛夊緢鏃╁氨鏈?/p>
64bit
澶勭悊鍣ㄤ簡锛屾瘮濡?/p>
SUN
鍏徃鐨?/p>
UltraSparc
鈪€�?/p>
IBM
鍏徃鐨?/p>
POWER5
銆?/p>
HP
鍏徃鐨?/p>
Alpha
绛夈�?/p>
64bit
璁＄畻涓昏鏈変袱澶т紭鐐癸細涓�鏄彲浠ヨ繘琛屾洿澶ц寖鍥寸殑鏁存暟杩愮畻锛涗簩鏄彲浠ユ敮鎸佹洿澶х殑
鍐呭瓨銆備笉鑳藉洜涓烘暟瀛椾笂鐨勫彉鍖栵紝鑰岀畝鍗曠殑璁や负
64bit
澶勭悊鍣ㄧ殑鎬ц兘鏄?/p>
32bit
澶勭悊鍣ㄦ�ц兘鐨勪袱
鍊嶃�傚疄闄呬笂锛屽湪
32bit
搴旂敤涓嬶紝
32bit
澶勭悊鍣ㄧ殑鎬ц兘鐢氳嚦浼氭洿寮猴紝鍗充娇鏄?/p>
64bit
澶勭悊鍣紝鐩?/p>
鍓嶆儏鍐典笅涔熸槸鍦?/p>
32bit
搴旂敤涓嬫�ц兘鏇村己銆傛墍浠ワ紝瑕佽娓?/p>
64bit
澶勭悊鍣ㄧ殑浼樺娍锛屼絾涓嶅彲杩蜂俊
64bit
銆?/p>
鐩墠涓绘祦
CPU
浣跨敤鐨?/p>
64
浣嶆妧鏈紝涓昏鏈?/p>
AMD
鍏徃鐨?/p>
AMD64
浣嶆妧鏈�?/p>
Intel
鍏徃鐨?/p>
EM64T
鎶�鏈�佸拰
Intel
鍏徃鐨?/p>
IA-64
鎶�鏈�傚叾涓?/p>
IA-64
鏄?/p>
Intel
鐙珛寮�鍙戯紝涓嶅吋瀹圭幇鍦ㄤ紶缁熺殑
32
浣嶈绠楁満锛屼粎鐢ㄤ簬
Itanium
锛堝畨鑵撅級浠ュ強鍚庣画浜у搧
Itanium2
锛屼竴鑸敤鎴蜂笉浼氭秹鍙婂埌銆傚洜姝わ紝
杩欓噷浠呭
AMD64
浣嶆妧鏈拰
Intel
鐨?/p>
EM64T
鎶�鏈綔涓�绠�鍗曚粙缁嶃�?/p>
1)AMD64
浣嶆妧鏈?/p>
AMD64
鐨勪綅鎶�鏈紝
鏄湪鍘熷
32
浣?/p>
X86
鎸囦护闆嗙殑鍩虹涓婏紝
鍔犲叆浜?/p>
X86-64
鎵╁睍
64
浣?/p>
X86
鎸?/p>
浠ら泦锛?/p>
浣胯繖娆捐姱鐗囧湪纭欢涓婂吋瀹瑰師鏉ョ殑
32
浣?/p>
X86
杞欢锛?/p>
骞跺悓鏃舵敮鎸?/p>
X86-64
鐨勬墿灞?/p>
64
浣嶈绠楋紝
浣垮緱杩欐鑺墖鎴愪负鐪熸鐨?/p>
64
浣?/p>
X86
鑺墖銆傝繖鏄竴涓湡姝ｇ殑
64
浣嶇殑鏍囧噯锛?/p>
X86-64
鍏锋湁
64
浣?/p>
鐨勫鍧�鑳藉姏銆?/p>
X86-64
鏂板鐨勫嚑缁?/p>
CPU
瀵勫瓨鍣紝
灏嗘彁渚涙洿蹇殑鎵ц鏁堢巼銆?/p>
瀵勫瓨鍣ㄦ槸
CPU
鍐呴儴鐢ㄦ潵鍒涘缓鍜?/p>
鍌ㄥ瓨
CPU
杩愮畻缁撴灉鍜屽叾瀹冭繍绠楃粨鏋滅殑鍦版柟銆傛爣鍑嗙殑
32-bitX86
鏋舵瀯锛屽寘鎷?/p>
8
涓�氱敤瀵勫瓨鍣?/p>
锛?/p>
GPR
锛?/p>
锛?/p>
AMD
鍦?/p>
X86-64
涓張澧炲姞浜?/p>
8
缁勶紙
R8-R9
锛?/p>
锛屽皢瀵勫瓨鍣ㄧ殑鏁扮洰鎻愰珮鍒颁簡
16
缁勩�?/p>
X86-64
瀵勫瓨鍣ㄩ粯璁や綅
64-bit
銆傝繕澧炲姞浜?/p>
8
缁?/p>
128-bitXMM
瀵勫瓨鍣紙涔熷彨
SSE
瀵勫瓨鍣紝
XMM8-XMM15
锛?/p>
锛?/p>
灏嗚兘缁欏崟鎸囦护澶氭暟鎹祦鎶�鏈紙
SIMD
锛夎繍绠楁彁渚涙洿澶氱殑绌洪棿锛岃繖浜?/p>
128
浣嶇殑瀵勫瓨鍣ㄥ皢鎻愪緵鍦ㄧ煝
閲忓拰鏍囬噺璁＄畻妯″紡涓嬭繘琛?/p>
128
浣嶅弻绮惧害澶勭悊锛?/p>
涓?/p>
3D
寤烘ā銆?/p>
鐭㈤噺鍒嗘瀽鍜岃櫄鎷熺幇瀹炵殑瀹炵幇鎻愪緵浜?/p>
纭欢鍩虹銆?/p>
閫氳繃鎻愪緵浜嗘洿澶氱殑瀵勫瓨鍣紝
鎸夌収
X86-64
鏍囧噯鐢熶骇鐨?/p>
CPU
锛?/p>
鍙互鏇存湁鏁堢殑澶勭悊鏁版嵁锛?/p>
鍙互鍦ㄤ竴涓椂閽熷懆鏈熶腑浼犺緭鏇村鐨勪俊鎭�?/p>
2)EM64T
鎶�鏈?/p>
Intel
瀹樻柟鏄粰
EM64T
杩欐牱瀹氫箟鐨勶細
EM64T
鍏ㄧО
ExtendedMemory64Technology
锛屽嵆鎵╁睍
64bit
鍐呭瓨鎶�鏈�?/p>
EM64T
鏄?/p>
IntelIA-32
鏋舵瀯鐨勬墿灞曪紝
鍗?/p>
IA-32e
锛?/p>
IntelArchitectur-32extension
锛?/p>
銆?/p>
IA-32
澶勭悊鍣ㄩ�氳繃闄勫姞
EM64T
鎶�鏈紝渚垮彲鍦ㄥ吋瀹?/p>
IA-32
杞欢鐨勬儏鍐典笅锛屽厑璁歌蒋浠跺埄鐢ㄦ洿澶氱殑鍐呭瓨鍦?/p>
鍧�绌洪棿锛屽苟涓斿厑璁歌蒋浠惰繘琛?/p>
32bit
绾挎�у湴鍧�鍐欏叆銆?/p>
EM64T
鐗瑰埆寮鸿皟鐨勶紝鏄
32bit
鍜?/p>
64bit
鐨勫吋瀹规�с�?/p>
Intel
涓烘柊鏍稿績澧炲姞浜?/p>
8
涓?/p>
64bitGPRs
锛?/p>
R8-R15
锛?/p>
锛屽苟涓旀妸鍘熸湁
GRPs
鍏ㄩ儴鎵╁睍涓?/p>
64bit
锛?/p>
濡傚墠鏂囨墍杩帮紝
杩欐牱鍙互鎻愰珮鏁存暟杩愮畻鑳藉姏銆?/p>
澧炲姞
8
涓?/p>
128bitSSE
瀵勫瓨鍣?/p>
锛?/p>
XMM8-XMM15
锛?/p>
锛?/p>
鏄负浜嗗寮哄濯掍綋鎬ц兘锛屽寘鎷
SSE
銆?/p>
SSE2
鍜?/p>
SSE3
鐨勬敮鎸併�?/p>
Intel
涓烘敮鎸?/p>
EM64T
鎶�鏈殑澶勭悊鍣紝
璁捐浜嗕袱澶фā寮忥細
浼犵粺
IA-32
妯″紡
锛?/p>
legacyIA-32mode
锛?/p>
鍜?/p>
IA-32e
鎵╁睍妯″紡锛?/p>
IA-32emode
锛?/p>
銆傚湪鏀寔
EM64T
鎶�鏈殑澶勭悊鍣ㄥ唴锛屾湁涓�涓О涔嬩负鎵╁睍鍔熻兘
婵�娲诲瘎瀛樺櫒锛?/p>
extendedfeatureenableregister
锛?/p>
IA32_EFER
锛夌殑閮ㄤ欢锛屽叾涓殑
Bit10
鎺у埗鐫�
EM64T
鏄惁婵�娲汇�?/p>
Bit10
琚О浣?/p>
IA-32e
妯″紡鏈夋晥
锛?/p>
IA-32emodeactive
锛夋垨
闀挎ā寮忔湁鏁?/p>
锛?/p>
longmodeactive
锛?/p>
LMA)
銆傚綋
LMA
锛?/p>
0
鏃讹紝澶勭悊鍣ㄤ究浣滀负涓�棰楁爣鍑嗙殑
32bit
锛?/p>
IA32
锛夊鐞嗗櫒杩?