Chap1
缁
1
銆?/p>
IC
浜у搧浠庤璁″埌鑺墖浜у搧鐨勪骇涓氶摼娴佺▼锛屼簡瑙ｆ楠?/p>
浠庤璁°�佸埗閫犮�佸皝瑁呫�佹祴璇曞埌鑺墖浜у搧
飪?/p>
璁捐锛氫粠绯荤粺璁捐鍒扮増鍥捐璁?/p>
飪?/p>
鍒堕�狅細
鎺╂ā鐗堬紙鍏夌僵鐗堛�?/p>
Mask
锛夊埗浣?/p>
锛?/p>
瀵规瘡灞傜増鍥鹃兘瑕佸埗浣滀竴灞傛帺妯＄増锛屽疄闄呮槸鍏夊埢宸ュ簭鐨勬鏁帮紱
闄ら噾灞炲眰澶栵紝涓�鑸?/p>
CMOS
鐢佃矾鑷冲皯闇�瑕?/p>
10
灞備互涓婃帺妯＄増
鏅跺渾鍒堕�狅紙鍏夊埢锛?/p>
锛?/p>
Wafer Manufacturing
锛?/p>
飪?/p>
灏佽锛氬厛杩涜鏅跺渾鍒囧壊锛?/p>
灏佽鍙互婊¤冻浠ヤ笅鍑犱釜闇�瑕侊細
灏佽缁欎簣鑺墖鏈烘鏀拺锛?/p>
灏佽鍗忓姪鑺墖鍚戝懆鍥寸幆澧冩暎鐑紝淇濇姢鑺墖鍏嶅彈鍖栧鑵愯殌锛?/p>
灏佽寮曡剼鍙互鎻愪緵鑺墖鍦ㄦ暣鏈轰腑鐨勬湁鏁堢剨鎺?/p>
灏佽鏂瑰紡锛?/p>
DIP
銆?/p>
PGA
銆?/p>
BGA
飪?/p>
娴嬭瘯锛?/p>
鈶?/p>
涓祴锛堟櫠鍦嗘祴璇曘�?/p>
Wafer Testing
锛?/p>
锛氭櫠鍦嗗埗閫犲畬鎴愬悗鐨勬祴璇?/p>
鈶?/p>
鎴愭祴锛堟垚鍝佹祴璇曘�?/p>
Final
Testing
锛?/p>
锛氳姱鐗囧皝瑁呭畬鎴愬悗鐨勬祴璇曪紝闇�瀵规瘡涓姱鐗囪繘琛屾祴
璇?/p>
2
銆?/p>
IC
璁捐涓渶瑕佽�冭檻鐨勫洜绱?/p>
婊¤冻鍔熻兘瑕佹眰锛?/p>
婊¤冻鎬ц兘瑕佹眰锛氶�熷害銆佸姛鑰楋紙绋嶅姞灞曞紑璁鸿堪锛?/p>
锛?/p>
闄嶄綆鑺墖鎴愭湰锛氳璁℃垚鏈紝鍒堕�犳垚鏈紝娴嬭瘯鎴愭湰锛堥噰鐢ㄥ彲娴嬭瘯鎬ц璁★紙
DFT
锛夋柟娉曪級
寤堕暱鑺墖浣跨敤瀵垮懡锛涚缉鐭姱鐗囬潰甯傛椂闂达紙
Time-to-Market
锛?/p>
Chap3
閫昏緫闂ㄥ崟鍏?/p>
1
銆侀�昏緫闂ㄦ椂寤剁殑绛夋晥鐢甸樆鏃跺欢浼扮畻妯″瀷
2
銆佽兘澶熸牴鎹�昏緫琛ㄨ揪寮忕敾鍑?/p>
CMOS
闈欐�侀�昏緫闂ㄧ數璺紙
Transistor-level
锛?/p>
2-NAND
鍜?/p>
2-NOR
鐨勭數璺疄渚?/p>
+
b
a
out
鏃跺欢
d
t
= -(
n
R
+
L
R
)
L
C
ln0.5=0.69
L
n
C
R
杞崲鏃堕棿
f
t
= -(
n
R
+
L
R
)
L
C
ln0.9=2.2
L
n
C
R
涓嬫媺缃戠粶
NOMS
鐨勭瓑鏁堢數闃?/p>
n
R
锛涗笂鎷夌綉缁?/p>
NOMS
鐨勭瓑鏁堢數闃?/p>
p
R